1. Field of the Invention
The present invention relates to a solid state image pickup device and a method for manufacturing a solid state image pickup device. In particular, the present invention relates to a pixel transistor configuration.
2. Description of the Related Art
An APS type solid state image pickup device is mentioned as one of solid state image pickup devices used for digital cameras and the like. Regarding the solid state image pickup device, reduction in pixel pitch to increase the number of pixels has advanced and reduction in leakage of carriers to adjacent pixels (color mixture) has been studied, the leakage being caused by the pitch reduction.
Regarding the leakage of carriers to adjacent pixels, for example, a configuration is known, in which a semiconductor region having polarity reverse to the polarity of a signal carrier is disposed between adjacent photoelectric conversion units. A potential barrier against a signal carrier is formed by such a configuration, and leakage to adjacent pixels or adjacent photoelectric conversion units is suppressed.
Japanese Patent Laid-Open No. 2006-024907 discloses a specific configuration of a potential barrier in the case where a structure, which improves the quantum efficiency of photoelectric conversion by deepening a P-type well region constituting a part of a photoelectric conversion unit, is formed.
Regarding the plane layout disclosed in Japanese Patent Laid-Open No. 2006-024907, if the reduction in pixel pitch advances, further study is in order because of the following points.
In order to maintain the sensitivity even when the light-receiving area of the photoelectric conversion unit is reduced, it is desirable that areas occupied by a pixel transistor and the potential barrier are reduced while the light-receiving area is maintained.
In general, in the case where the potential barrier disclosed in Japanese Patent Laid-Open No. 2006-024907 is formed deeply in a semiconductor substrate, formation is performed through high energy ion implantation. At this time, an opening of a resist mask for ion implantation is in the shape having a high aspect ratio. If a mask shape having a high aspect ratio is employed, “sagging” of the frontage shape of the opening may occurs and, thereby, the film thickness of the resist mask in the vicinity of the opening may be reduced. Consequently, unintended impurity ions may be implanted into the region in the vicinity of the substrate surface.
Furthermore, regarding the incident angle in the ion implantation, there is a certain angle with respect to the direction of the normal to the substrate in many cases. Among impurity ions implanted through a narrow opening of the resist mask, impurity ions implanted at small angles with respect to the substrate surface are decelerated by repetition of reflection at and collision with the side wall of the resist mask. Unintended impurity ions may also be implanted into the region in the vicinity of the substrate surface because of such a phenomenon.
As described above, if the width of the potential barrier formed at a deep position from the surface of the semiconductor substrate is reduced, influences of unintended impurity ions implanted into a shallow region of the substrate surface and the vicinity of the opening region become not neglected.
Impurity ions implanted into a shallow position from the substrate surface may change the characteristics, e.g., a threshold value, of the transistor from a design value. The deviation of the threshold value of the pixel transistor from the design value has influences on the characteristics of a solid state image pickup device. For example, a desired carrier transfer characteristic is not obtained, or a wide dynamic range is not obtained.